MBEstudio
The SysML v2 model reference
MBEstudio uses native SysML v2 source for parts, typed interfaces, equations, requirements and behavior. The current compiler implements a supported language subset with a geometry profile.
Quantities and units
Import the types and units you use, such as ISQ::* and SI::*. Write a quantity as 40 [W] or 0.1 [s]. The compiler checks dimensional consistency. Metadata fields such as rangeM or yawDeg use literal numbers in the units named by the field.
A model is source text
A package contains definitions and usages. A top-level part usage is the system to elaborate. Model chooses an example or opens a SysML text file; Export saves the source. JSON exports represent derived data, not the native authoring format.
Parts and attributes
Use part def for a reusable type and part name : Type for an instance. Attributes can be stated values, expressions or missing inputs. A missing measurement remains unknown. Use default = for an initial value that a state machine can assign during a run.
Authored geometry and placement
The MBEstudio profile adds placement, material, envelope and field-of-view metadata. Body features include extrusions, revolutions, lofts and Boolean operations. The hatchback uses polygon-section lofts for its body and glazing. Packaging envelopes and authored material geometry serve different checks.
Typed ports
A port def declares the features exchanged at an endpoint. Port usages reference the type; a conjugated type uses ~ to reverse its direction. Inspect ports in 3D, Interfaces and the internal block diagram.
Interfaces and connections
An interface def declares typed ends. An interface usage connects the actual part ports. The hatchback includes electrical power, data, fluid and shaft-torque interfaces. A displayed connection establishes modeled connectivity; it is not automatically a detailed manufactured wire route.
State behavior
Declare a state machine inside a part, name its initial state with entry; then idle;, and use timed triggers or guards. State entry assignments change model attributes. Simulation evaluates the resulting sequence and Diagrams displays its structure.
package CoolingStudy {
private import ISQ::*; private import SI::*;
part def Controller {
attribute output : PowerValue default = 0 [W];
state modes {
entry; then idle;
state idle;
state active { entry assign output := 40 [W]; }
transition start first idle accept after 2 [s] then active;
}
constraint withinBudget { output <= 50 [W] }
}
part controller : Controller;
}The current simulator runs top-level machines on their owning instances. Nested composite-state execution is not implemented.
Requirements and executable checks
Declare a requirement def with a subject and require constraint. A satisfy relationship identifies the implementing subject. A boolean expression determines satisfaction; a numeric comparison can produce a value, limit and margin. Use assume constraint for applicability conditions over a simulation run.
Interpret results and exports
Requirements can be satisfied, violated or indeterminate. Simulation also shows not-applicable intervals when assumptions are false. Stated dimensions, response delays and sensor fields remain design assumptions until verified. Review the source, requirement results, budgets, BOM and report together.
Current limitations describe the boundary of these checks. The bundled examples are the most direct reference for syntax accepted by the deployed compiler.
